SLWSTK6101B Datasheet, PDF (6/84 Pages) Silicon Laboratories – BGM113 Blue Gecko Bluetooth ® Module Data Sheet

BGM113 Blue Gecko Bluetooth ^® Module Data Sheet
System Overview
3.3 Power
The BGM113 has an Energy Management Unit (EMU) and efficient integrated regulators to generate internal supply voltages. Only a
single external supply voltage is required, from which all internal voltages are created. An integrated DC-DC buck regulator is utilized to
further reduce the current consumption.
Figure 3.2. Power Supply Configuration
3.3.1 Energy Management Unit (EMU)
The Energy Management Unit manages transitions of energy modes in the device. Each energy mode defines which peripherals and
features are available and the amount of current the device consumes. The EMU can also be used to turn off the power to unused RAM
blocks, and it contains control registers for the dc-dc regulator and the Voltage Monitor (VMON). The VMON is used to monitor multiple
supply voltages. It has multiple channels which can be programmed individually by the user to determine if a sensed supply has fallen
below a chosen threshold.
3.3.2 DC-DC Converter
The DC-DC buck converter covers a wide range of load currents and provides up to 90% efficiency in energy modes EM0, EM1, EM2
and EM3. Patented RF noise mitigation allows operation of the DC-DC converter without degrading sensitivity of radio components.
Protection features include programmable current limiting, short-circuit protection, and dead-time protection. The DC-DC converter may
also enter bypass mode when the input voltage is too low for efficient operation. In bypass mode, the DC-DC input supply is internally
connected directly to its output through a low resistance switch. Bypass mode also supports in-rush current limiting to prevent input
supply voltage droops due to excessive output current transients.
3.4 General Purpose Input/Output (GPIO)
BGM113 has up to 14 General Purpose Input/Output pins. Each GPIO pin can be individually configured as either an output or input.
More advanced configurations including open-drain, open-source, and glitch-filtering can be configured for each individual GPIO pin.
The GPIO pins can be overridden by peripheral connections, like SPI communication. Each peripheral connection can be routed to sev-
eral GPIO pins on the device. The input value of a GPIO pin can be routed through the Peripheral Reflex System to other peripherals.
The GPIO subsystem supports asynchronous external pin interrupts.
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