SI53159-A01AGM Datasheet, PDF (5/22 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, & GEN 3 NINE OUTPUT FANOUT BUFFER

Si53159
Table 2. AC Electrical Specifications
Parameter
Symbol
Condition
Min Typ
DIFFIN at 0.7 V
DIFFIN and DIFFIN
Rising/Falling Slew Rate
T_R / T_F Single ended measurement: 0.6 —
V_OL = 0.175 to V_OH = 0.525 V
(Averaged)
Differential Input High Voltage
Differential Input Low Voltage
Crossing Point Voltage at 0.7 V
Swing
V_IH
150 —
V_IL
—
—
V_OX
Single-ended measurement 250 —
Vcross Variation Over All edges
V_OX
Single-ended measurement —
—
Differential Ringback Voltage
V_RB
–100 —
Time before Ringback Allowed
T_STABLE
500 —
Absolute Maximum Input Voltage V_MAX
—
Absolute Minimum Input Voltage
V_MIN
–0.3 —
DIFFIN and DIFFIN Duty Cycle
T_DC Measured at crossing point V_OX 45
—
Rise/Fall Matching
T_RFM
Determined as a fraction of
2 x (T_R – T_F)/(T_R + T_F)
—
—
DIFF at 0.7 V
Duty Cycle
Clock Skew
PCIe Gen1 Pk-Pk Jitter
T_DC
Measured at 0 V differential 45 —
T_SKEW Measured at 0 V differential
—
—
Pk-Pk
PCIe Gen 1
0
—
PCIe Gen 2 Phase Jitter
RMS_GEN2
10 kHz < F < 1.5 MHz
1.5 MHz < F < Nyquist
0
—
0
—
PCIe Gen 3 Phase Jitter
RMS_GEN3 Includes PLL BW 2–4 MHz,
0
—
CDR = 10 MHz
Additive Cycle to Cycle Jitter
T_CCJ
In buffer mode.
— 20
Measured at 0 V differential
Long-term Accuracy
Rising/Falling Slew rate
L_ACC
Measured at 0 V differential
—
—
T_R / T_F Measured differentially from 2.5 —
±150 mV
Crossing Point Voltage at 0.7 V
V_OX
Swing
300 —
Enable/Disable and Setup
Clock Stabilization from Power-Up T_STABLE
Stopclock Set-up Time
T_SS
Note: Visit www.pcisig.com for complete PCIe specifications.
—
—
10.0 —
Max Unit
4
V/ns
—
mV
–150 mV
550 mV
140 mV
100 mV
—
ps
1.15 V
—
V
55
%
20
%
55
%
50
ps
10
ps
0.5
ps
0.5
ps
0.10 ps
50
ps
100 ppm
8
V/ns
550 mV
1.8 ms
—
ns
Rev. 1.0
5