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SI4700-EVB Datasheet, PDF (5/44 Pages) Silicon Laboratories – Si4700/01/02/03 EVALUATION BOARD USER’S GUIDE
Si4700/01/02/03-EVB
3.1. Si4700/01/02/03 Baseboard
3.1.1. Microcontroller and Associated Peripherals
The Si4700/01/02/03 evaluation board uses a Silicon
Laboratories' C8051F320 microcontroller to control the
Si4700/01/02/03 and to provide USB connectivity to the
EVB (via J1). The LED D1 blinks to confirm that power
is being properly supplied to the C8051F320 and the
MCU firmware has loaded. Push-button PB1 manually
resets the C8051F320. The JTAG connector J2 is used
to program the C8051F320 at production time, and is
not necessary for normal operation. J2 can be used for
downloading example code or updating the MCU
firmware. See www.mysilabs.com for details.
3.1.2. Reference Clock for the Si4700/01/02/03
The Si4700/01/02/03 accepts a 32.768 kHz reference
clock input at the RCLK pin. On the baseboard, this
clock is provided by a precision crystal oscillator. The
output of the oscillator is routed to the Si4700/01/02/03
RCLK pin through a Schmitt-trigger buffer (U5) and a
33  series termination resistor (R19). The user has the
option of not using the oscillator and bringing in the
reference clock from an external source through J6.
This can be achieved by depopulating R19 and
populating R21 with a 0  resistor as shown in Table 1.
Note that the reference clock is not routed through the
Schmitt-trigger buffer when an external clock source is
being used. A third option is available which takes
advantage of the Si4700/01/02/03 internal oscillator.
This can be achieved by depopulating R2 and R3 on the
bottom of the daughter card.
3.1.3. Power Supply Network
When the EVB is used in its simplest configuration,
SW1 can be set to USB POWER and powered via the
USB connector, J1, or to EXT POWER and powered via
the ac connector J7 and included transformer. No
additional configuration is required beyond selecting the
position of SW1.
J7 is a 2.1 mm power jack for use with standard
transformer power bricks. The power brick must be dc
and provide at least 5 V on the inner conductor. The
regulators on the baseboard are capable of handling up
to 26 V, so most dc power bricks are acceptable. To
power the board via J7, SW1 must be in the EXT
POWER position and no power should be applied via
J4. This configuration is convenient when using the
JTAG header to program custom code into the
C8051F320.
For additional flexibility in usage and testing, the
baseboard can accept power from up to 3 independent
power supplies via connector J4. When connecting one
or more power supplies to connector J4, care must be
taken not to supply power via J1 (USB POWER) or J7
(EXT POWER). When connecting more than one power
supply to connector J4, care must be taken to configure
R1, R2, and R4. See the Figure 2 for reference.
J4 provides flexibility for varying the 3 separate supplies
on the board: VRADIO, VAUDIO, and VIO/VMCU.
VRADIO is applied to the VA and VD pins of the
Si4700/01/02/03, VAUDIO powers the audio amplifier
network, and VIO/VMCU powers the baseboard
microcontroller, the reference clock system, and VIO on
the Si4700/01/02/03. Prior to using J4 it is necessary to
remove R1, R2, and R4 as these resistors short the
three connections on J4 together.
When supplying VIO/VMCU via the J4 connector, a
supply > 5 V may be used in conjunction with the 3.3 V
LDO regulator U2. However, U2 may be bypassed by
depopulating U2 and populating R30 with a 0  resistor.
In this case, the VMCU/VIO supply at J4 must lie
between 3.0 and 3.6 V. This condition is necessary to
ensure reliable operation of the C8051F320.
When supplying VRADIO via the J4 connector, a supply
> 5 V may be used in conjunction with the 3.3 V LDO
regulator U3. However, U3 may be bypassed by
depopulating R14 and populating R25 with a 0 
resistor. In such a case, the VRADIO supply at J4 must
lie between 2.7 and 5.5 V. These are the
recommended operating conditions for the
Si4700/01/02/03.
Rev. 0.9
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