SI4700-EVB Datasheet, PDF (4/44 Pages) Silicon Laboratories – Si4700/01/02/03 EVALUATION BOARD USER’S GUIDE

Si4700/01/02/03-EVB
3. Description
The following sections refer to both the image in Figure 1 and the silk screen on the Si4700/01/02/03 EVB. It is
recommended to refer to both when using this guide.
J1
PB1
SW1
J2
J6
J1 - Daughter Card
J3
X1
X1 - Daughter Card
J3 - Daughter Card
U1
U4
U2
J5 (not visible)
J2 - Daughter Card
(not visible)
D1
J7
J4
J10
J11
Figure 1. Locations of I/O Connectors/Devices
Baseboard I/O connectors/devices:
J1 USB connector for USB interface
J2 JTAG connector for the C8051F320 MCU
J3 20-pin Expansion I/O connector
J4 Power input terminal block
J5 Baseboard card connector (not visible when the
baseboard and daughter card are mated)
J6 SMA connector for external 32.768 kHz RCLK
clock input
J7 2.1 mm power connector
J10 BNC connector for left audio output
J11 BNC connector for right audio output
PB1 Push-button to reset the C8051F320 MCU
D1 LED to confirm power supply to the C8051F320
MCU
SW1 USB (J7–J4) power selection switch
Daughter card I/O connectors/devices:
J1 SMA connector for RF (single-ended or non-
inverting differential) input
J2 Baseboard connector (not visible when the
baseboard and daughter card are mated)
J3 Stereo headphone connector for audio output and
antenna input
U1 Si4700/01/02/03
U2 LOUT/ROUT audio op-amp
U4 Headphone audio op-amp
U5 Schmidt trigger buffer (not visible)
X1 Daughter card 32.768 kHz crystal.
The EVB consists of various subsystems that are
explained in greater detail in the following sections.
X1 Baseboard 32.768 kHz crystal oscillator
4
Rev. 0.9