SI4720-B20-GMR Datasheet, PDF (34/48 Pages) Silicon Laboratories – BROADCAST FM RADIO TRANSCEIVER FOR PORTABLE APPLICATIONS

Si4720/21-B20
After the rising edge of RST, the pins, GPO1 and
GPO2/INT, are used as general-purpose output (O) pins
as described in Section “5.15. GPO Outputs”. In any
bus mode, commands may only be sent after V_IO and
V_DD supplies are applied.
5.24.1. 2-Wire Control Interface Mode
When selecting 2-wire mode, the user must ensure that
SCLK is high during the rising edge of RST, and stays
high until after the first start condition. Also, a start
condition must not occur within 300 ns before the rising
edge of RST.
2-wire bus mode uses only the SCLK and SDIO pins for
signaling. A transaction begins with the START
condition, which occurs when SDIO falls while SCLK is
high. Next, the user drives an 8-bit control word serially
on SDIO, which is captured by the device on rising
edges of SCLK. The control word consists of a seven bit
device address followed by a read/write bit (read = 1,
write = 0). The Si4720/21 acknowledges the control
word by driving SDIO low on the next falling edge of
SCLK.
Although the Si4720/21 responds to only a single
device address, this address can be changed with the
SEN pin (note that the SEN pin is not used for signaling
in 2-wire mode). When SEN = 0, the seven-bit device
address is 0010001. When SEN = 1, the address is
1100011.
For write operations, the user then sends an eight bit
data byte on SDIO, which is captured by the device on
rising edges of SCLK. The Si4720/21 acknowledges
each data byte by driving SDIO low for one cycle, on the
next falling edge of SCLK. The user may write up to
eight data bytes in a single two-wire transaction. The
first byte is a command, and the next seven bytes are
arguments.
For read operations, after the Si4720/21 has
acknowledged the control byte, it drives an eight-bit
data byte on SDIO, changing the state of SDIO on the
falling edge of SCLK. The user acknowledges each data
byte by driving SDIO low for one cycle, on the next
falling edge of SCLK. If a data byte is not
acknowledged, the transaction ends. The user may
read up to 16 data bytes in a single two-wire
transaction. These bytes contain the response data
from the Si4720/21.
A 2-wire transaction ends with the STOP condition,
which occurs when SDIO rises while SCLK is high.
For details on timing specifications and diagrams, refer
to Table 5, “2-Wire Control Interface
Characteristics^1,2,3,” on page 8, Figure 2, “2-Wire
Control Interface Read and Write Timing Parameters,”
on page 9, and Figure 3, “2-Wire Control Interface Read
and Write Timing Diagram,” on page 9.
5.24.2. SPI Control Interface Mode
When selecting SPI mode, the user must ensure that a
rising edge of SCLK does not occur within 300 ns
before the rising edge of RST.
SPI bus mode uses the SCLK, SDIO, and SEN pins for
read/write operations. For reads, the user can choose to
receive data from the device on either SDIO or GPO1. A
transaction begins when the user drives SEN low. The
user then pulses SCLK eight times while driving an 8-bit
control byte (MSB first) serially on SDIO. The device
captures the data on rising edges of SCLK. The control
byte must have one of these values:
0x48 = write eight command/argument bytes (user
drives write data on SDIO)
0x80 = read status byte (device drives read data on
SDIO)
0xA0 = read status byte (device drives read data on
GPO1)
0xC0 = read 16 response bytes (device drives read data
on SDIO)
0xE0 = read 16 response bytes (device drives read data
on GPO1)
When writing a command, after the control byte has
been written, the user must drive exactly eight data
bytes (a command byte and seven argument bytes) on
SDIO. The data will be captured by the device on the
rising edges of SCLK. After all eight data bytes have
been written, the user raises SEN after the last falling
edge of SCLK to end the transaction.
In any bus mode, before sending a command or reading
a response, the user must first read the status byte to
ensure that the device is ready (CTS bit is high). In SPI
mode, this is done by sending control byte 0x80 or
0xA0, followed by reading a single byte on SDIO or
GPO1. The Si4720/21 changes the state of SDIO or
GPO1 after the falling edges of SCLK. Data should be
captured by the user on the rising edges of SCLK. After
the status byte has been read, the user raises SEN after
the last falling edge of SCLK to end the transaction.
When reading a response, the user must read exactly
16 data bytes after sending the control byte. It is
recommended that the user keep SEN low until all bytes
have transferred. However, it will not disrupt the
protocol if SEN temporarily goes high at any time, as
long as the user does not change the state of SCLK
while SEN is high. After 16 bytes have been read, the
user raises SEN after the last falling edge of SCLK to
end the transaction.
At the end of any SPI transaction, the user must drive
SEN high after the final falling edge of SCLK. At any
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Rev. 1.0