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EZR32LG330 Datasheet, PDF (34/87 Pages) Silicon Laboratories – Building and home automation
4.11 Analog Digital Converter (ADC)
EZR32LG330 Data Sheet
Electrical Specifications
Table 4.16. ADC
Parameter
Input voltage range
Input range of external refer-
ence voltage, single ended
and differential
Input range of external nega-
tive reference voltage on
channel 7
Input range of external posi-
tive reference voltage on
channel 6
Common mode input range
Input current
Analog input common mode
rejection ratio
Average active current
Current consumption of inter-
nal voltage reference
Input capacitance
Input ON resistance
Input RC filter resistance
Input RC filter/decoupling ca-
pacitance
ADC Clock Frequency
Symbol
VADCIN
VADCREFIN
Test Condition
Single ended
Differential
VADCRE-
FIN_CH7
See VADCREFIN
VADCRE-
FIN_CH6
See VADCREFIN
VADCCMIN
IADCIN
2 pF sampling capacitors
CMRRADC
IADC
IADCREF
1 MSamples/s, 12 bit, external refer-
ence
10 kSamples/s 12 bit, internal 1.25 V
reference, WARMUPMODE in
ADCn_CTRL set to 0b00
10 kSamples/s 12 bit, internal 1.25 V
reference, WARMUPMODE in
ADCn_CTRL set to 0b01
10 kSamples/s 12 bit, internal 1.25 V
reference, WARMUPMODE in
ADCn_CTRL set to 0b10
Internal voltage reference
CADCIN
RADCIN
RADCFILT
CADCFILT
fADCCLK
6 bit
Min
0
-VREF/2
1.25
0
0.625
0
─
─
─
─
─
─
─
─
1
─
─
─
7
Conversion time
tADCCONV
8 bit
11
12 bit
13
Acquisition time
tADCACQ
Programmable
1
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Typ
Max
Unit
─
VREF
V
─
VREF/2
V
─
VDD
V
─
VDD - 1.1
V
─
VDD
V
─
VDD
V
<100
─
nA
65
─
dB
351
─
µA
67
─
µA
63
─
µA
64
─
µA
65
─
µA
2
─
pF
─
─
MOhm
10
─
kOhm
250
─
fF
─
13
MHz
─
─
ADCCLK
Cycles
─
─
ADCCLK
Cycles
─
─
ADCCLK
Cycles
─
256
ADCCLK
Cycles
Rev. 1.1 | 33