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SI5322 Datasheet, PDF (2/16 Pages) Silicon Laboratories – PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER
Si5322
Table 1. Performance Specifications
(VDD = 1.8, 2.5, or 3.3 V ±10%, TA = –40 to 85 ºC)
Parameter
Symbol
Test Condition
Min
Typ
Max Unit
Temperature Range
TA
Supply Voltage
VDD
–40
25
85
ºC
2.97
3.3
3.63
V
2.25
2.5
2.75
V
1.62
1.8
1.98
V
Supply Current
IDD
fOUT = 622.08 MHz
Both CKOUTs enabled
—
251
279
mA
LVPECL format output
CKOUT2 disabled
—
217
243
mA
fOUT = 19.44 MHz
Both CKOUTs enabled
CMOS format output
—
204
234
mA
CKOUT2 disabled
—
194
220
mA
Tristate/Sleep Mode
—
TBD
TBD
mA
Input Clock Frequency
(CKIN1, CKIN2)
Output Clock Fre-
quency (CKOUT1,
CKOUT2)
CKF
CKOF
Input frequency and clock multi-
plication ratio pin-selectable
from table of values using
FRQSEL and FRQTBL settings.
Consult Silicon Laboratories
configuration software
DSPLLsim or Any-Rate Preci-
sion Clock Family Reference
Manual at www.silabs.com/clock
for table selections.
19.44
19.44
—
707.35 MHz
—
1049.76 MHz
Input Clocks (CKIN1, CKIN2)
Differential Voltage
Swing
Common Mode
Voltage
CKNDPP
CKNVCM
1.8 V ±10%
2.5 V ±10%
0.25
—
0.9
—
1.0
—
1.9
VPP
1.4
V
1.7
V
3.3 V ±10%
1.1
—
1.95
V
Rise/Fall Time
Duty Cycle
CKNTRF
CKNDC
20–80%
Whichever is less
—
—
11
ns
40
—
60
%
50
—
—
ns
Output Clocks (CKOUT1, CKOUT2)
Common Mode
Differential Output
Swing
VOCM
VOD
LVPECL
100 Ω load
line-to-line
VDD – 1.42
—
VDD – 1.25 V
1.1
—
1.9
V
Single Ended Output
VSE
Swing
0.5
—
0.93
V
Note: For a more comprehensive listing of device specifications, please consult the Silicon Laboratories Any-Rate Precision
Clock Family Reference Manual. This document can be downloaded from www.silabs.com/timing.
2
Preliminary Rev. 0.47