SI5322 Datasheet, PDF (14/16 Pages) Silicon Laboratories – PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER

Si5322
DOCUMENT CHANGE LIST
Revision 0.44 to Revision 0.45
„ Condensed format.
Revision 0.45 to Revision 0.46
„ Removed references to latency control, INC, and
DEC in figures and text.
„ Changed LVTTL to LVCMOS in Table 2, “Absolute
Maximum Ratings,” on page 3.
„ Added Figure 1, “Typical Phase Noise Plot,” on page
4.
„ Updated “2. Pin Descriptions: Si5322”.
„ Added “5. Recommended PCB Layout”.
Revision 0.46 to Revision 0.47
„ Removed Figure 1. “Typical Phase Noise Plot.”
„ Changed pins 11 and 15 from NC to VDD in “2. Pin
Descriptions: Si5322”.
14
Preliminary Rev. 0.47