SI871X Datasheet, PDF (18/35 Pages) Silicon Laboratories – Industrial automation

Si871x/2x
New designs should consider the input circuit configurations of Figure 11, which are more efficient than those of
Figures 9 and 10. As shown, S1 and S2 represent any suitable switch, such as a BJT or MOSFET, analog
transmission gate, processor I/O, etc. Also, note that the Si871x/2x input can be driven from the I/O port of any
MCU or FPGA capable of sourcing a minimum of 6 mA (see Figure 11B). Additionally, note that the Si871x/2x
propagation delay and output drive do not significantly change for values of I_F between I_F(MIN) and I_F(MAX).
+5V
S1
Control
Input
R1
S2
Si871x/2x
1 ^N/C
2 _ANODE
3 ^CATHODE
Si871x/2x
1 N/C
MCU I/O
Port pin
2 ANODE
R1
3 CATHODE
4 _N/C
4 N/C
A
B
Figure 11. Si871x/2x Other Input Circuit Configurations
4.2. Output Circuit Design and Power Supply Connections
GND can be biased at, above, or below ground as long as the voltage on V_DD with respect to GND is a maximum
of 5.5 V. V_DD decoupling capacitors should be placed as close to the package pins as possible. The optimum
values for these capacitors depend on load current and the distance between the chip and its power source. It is
recommended that 0.1 and 1 µF bypass capacitors be used to reduce high-frequency noise and maximize
performance. Opto replacement applications should limit their supply voltages to 5.5 V or less.
18
Rev. 1.0