ISL6742B Datasheet, PDF (18/20 Pages) Intersil Corporation – Fast current sense to output delay

ISL6742B
Average Current Mode Control
The average current signal produced on IOUT may also be used
for average current mode control rather than peak current mode
control. There are many advantages to average current mode
control, most notably, improved noise immunity and greater
design flexibility of the current feedback loop compensation.
Figure 19 portrays the concept.
VERR
C₂
R₃
IOUT
R₂
VOUT
C₁
R₄
R₁
-
OFFSET
U2
-
+
U1
+ ^REF
R_b
CURRENT
ERROR
VOLTAGE ERROR
AMPLIFIER
AMPLIFIER
FIGURE 19. AVERAGE CURRENT MODE CONTROL
Instead of being compared to a peak current sense signal as it
would be in a peak current mode control configuration, the
voltage amplifier output is integrated against the average output
current. The voltage loop compensation and the current loop
compensation may be adjusted independently.
The voltage error amplifier programs the average output current
of the supply, and its maximum output level determines the
maximum output current. Either I_OUT or the voltage EA output
must be scaled appropriately to achieve the desired current limit
setpoint. The offset voltage shown in Figure 19 must be provided
to compensate for input offset voltage of the current amplifier to
ensure that zero duty cycle operation is achievable.
Depending on the performance requirements of the control loop,
compensation networks other than shown may be required.
Fault Conditions
A fault condition occurs if VREF or VDD fall below their
Undervoltage Lockout (UVLO) thresholds or if the thermal
protection is triggered. When a fault is detected, the soft-start
capacitor is quickly discharged, and the outputs are disabled low.
When the fault condition clears and the soft-start voltage is below
the reset threshold, a soft-start cycle begins.
An overcurrent condition is not considered a fault and does not
result in a shutdown.
Thermal Protection
Internal die over temperature protection is provided. An
integrated temperature sensor protects the device should the
junction temperature exceed +140°C. There is approximately
+15°C of hysteresis.
Ground Plane Requirements
Careful layout is essential for satisfactory operation of the device.
A good ground plane must be employed. VDD and VREF should
be bypassed directly to GND with good high frequency
capacitance.
References
[1] Ridley, R., “A New Continuous-Time Model for Current Mode
Control”, IEEE Transactions on Power Electronics, Vol. 6, No.
2, April 1991.
Submit Document Feedback ₁₈
FN8565.1
November 3, 2015