SI8630 Datasheet, PDF (15/36 Pages) Silicon Laboratories – Low-Power Triple-Channel Digital Isolators

Si8630/31/35 Data Sheet
Electrical Specifications
Parameter
Symbol
Test Condition
Min
Typ Max Unit
V_I = V_DD or 0 V
Common Mode Transient Immunity
Si86xxxB/C/D
Si86xxxT
CMTI
V_CM = 1500 V
See Figure 4.3 Common-
35
Mode Transient Immunity Test
Circuit on page 11
60
kV/µs
50
—
100
—
Enable to Data Valid
t_en1
See Figure 4.1 ENABLE Tim-
—
ing Diagram on page 11
6.0
11
ns
Enable to Data Tri-State
t_en2
See Figure 4.1 ENABLE Tim-
—
ing Diagram on page 11
8.0
12
ns
Input power loss to valid default output
t_SD
See Figure 3.1 Device Behav-
—
ior during Normal Operation
on page 6
8.0
12
ns
Start-up Time ⁴
t_SU
—
15
40
µs
Note:
1. V_DD1 = 3.3 V ±10%; V_DD2 = 3.3 V ±10%, T_A = –40 to 125 °C
2. The nominal output impedance of an isolator driver channel is approximately 50 Ω, ±40%, which is a combination of the value of
the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission
line effects will be a factor, output pins should be appropriately terminated with controlled-impedance PCB traces.
3. t_PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same
supply voltages, load, and ambient temperature.
4. Start-up time is the time period from the application of power to the appearance of valid data at the output.
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