SI5347-EVB Datasheet, PDF (13/21 Pages) Silicon Laboratories – Powered from USB port or external

Si5347-EVB
10.5.1. Verify Free-Run Mode Operation
Assuming no external clocks have been connected to the INPUT CLOCK differential SMA connectors (labeled
“INx/INxB”) located around the perimeter of the EVB, the DUT should now be operating in free-run mode, as the
DUT will be locked to the crystal in this case.
You can run a quick check to determine if the device is powered up and generating output clocks (and consuming
power) by clicking on the Read All button highlighted above and then reviewing the voltage, current and power
readings for each VDDx supply.
Note: Shutting “Off” then “On” of the VDD and VDDA supplies will power-down and reset the DUT. Every time you do
this, to reload the Silicon Labs-created default plan into the DUT’s register space, you must go back to the Wiz-
ard’s main menu and select “Write Design to EVB”:
Figure 17. Write Design to EVB
Failure to do the step above will cause the device to read in a pre-programmed plan from its non-volatile
memory (NVM). However, the plan loaded from the NVM may not be the latest plan recommended by
Silicon Labs for evaluation.
At this point, you should verify the presence and frequencies of the output clocks (running to free-run mode from
the crystal) using appropriate external instrumentation connected to the output clock SMA connectors. To verify the
output clocks are toggling at the correct frequency and signal format, click on View Design Report as highlighted
below.
Figure 18. View Design Report
Rev. 1.1
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