EFM32PG1 Datasheet, PDF (13/94 Pages) Silicon Laboratories – Industrial and factory automation

EFM32PG1 Data Sheet
Electrical Specifications
4.1.3 DC-DC Converter
Test conditions: L_DCDC=4.7 µH, C_DCDC=1.0 µF, V_{DCDC_I}=3.3 V, V_{DCDC_O}=1.8 V, I_{DCDC_LOAD}=50 mA, Heavy Drive configuration,
F_{DCDC_LN}=8 MHz, unless otherwise indicated.
Table 4.3. DC-DC Converter
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Input voltage range
V_{DCDC_I}
Bypass mode
TBD
-
Low noise (LN) or low power (LP)
2.4
-
mode, 1.8 V output, 200 mA load
current
3.8
V
3.8
V
Output voltage range
V_{DCDC_O}
1.8V configuration
1.8
-
-
V
Steady-state output ripple V_R
ESR=50 Ω, ESL=2 nH on 1 μF fil-
-
3
-
mVpp
ter cap.
Output voltage under/over- V_OV
shoot
CCM Mode (LNFORCECCM¹ =
-
100
-
mV
1), Load changes between 0 mA
and 100 mA
DCM Mode (LNFORCECCM¹ =
-
150
-
mV
0), Load changes between 0 mA
and 10 mA
DC line regulation
V_REG
Input changes between 3.8 V and
-
0.1
-
%
2.4 V
DC load regulation
I_REG
Load changes between 0 mA and
-
0.1
-
%
100 mA in CCM mode
Quiescent current
I_{DCDC_Q}
Low power (LP) mode, lowest
-
50
-
nA
bias setting (LPCMPBIAS¹ =
BIAS0)
Low noise (LN) mode, DCM con-
-
0.3
-
mA
figuration (LNFORCECCM¹ = 0)
Low noise (LN) mode, CCM con-
-
0.8
-
mA
figuration (LNFORCECCM¹ = 1)
Regulation DC Accuracy
ACC_DC
Low noise (LN) mode, 1.8 V target TBD
-
output
-
mV
Low power (LP) mode,
LPCMPBIAS¹ = 0, 1.8 V target
output
TBD
-
mV
Low power (LP) mode,
LPCMPBIAS¹ = 3, 1.8 V target
output
TBD
-
mV
Max load current
I_{LOAD_MAX}
Low noise (LN) mode
-
Low power (LP) mode,
-
LPCMPBIAS¹ = 3
200
mA
10
mA
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