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SI597 Datasheet, PDF (1/12 Pages) Silicon Laboratories – QUAD FREQUENCY VOLTAGE-CONTROLLED CRYSTAL
Si597
QUAD FREQUENCY VOLTAGE-CONTROLLED CRYSTAL
OSCILLATOR (VCXO) 10 TO 810 MHZ
Features
 Available with any-frequency
output from 10 to 810 MHz
 4 selectable output frequencies
 3rd generation DSPLL® with
superior jitter performance
 Internal fixed fundamental mode
crystal frequency ensures high
reliability and low aging
 Available CMOS, LVPECL,
LVDS, and CML outputs
 3.3, 2.5, and 1.8 V supply options
 Industry-standard 5 x 7 mm
package and pinout
 Pb-free/RoHS-compliant
 –40 to +85 ºC operating range
Applications
 SONET/SDH (OC-3/12/48)  OTN
 Networking
 Clock recovery and jitter cleanup PLLs
 SD/HD SDI/3G SDI video  FPGA/ASIC clock generation
Description
The Si597 quad frequency VCXO utilizes Silicon Laboratories’ advanced
DSPLL® circuitry to provide a low-jitter clock for all output frequencies. The
Si597 is available with one of four pin-selectable ouput frequencies from 10
to 810 MHz. Unlike traditional VCXOs, where a different crystal is required
for each output frequency, the Si597 uses one fixed crystal to provide a wide
range of output frequencies. This IC-based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In
addition, DSPLL clock synthesis provides supply noise rejection, simplifying
the task of generating low-jitter clocks in noisy environments. The Si597 IC-
based quad frequency VCXO is factory-configurable for a wide variety of
user specifications including frequencies, supply voltage, output format,
tuning slope, and absolute pull range (APR). Specific configurations are
factory programmed at time of shipment, thereby eliminating the long lead
times associated with custom oscillators.
Functional Block Diagram
VDD
Si5602
Ordering Information:
See page 7.
Pin Assignments:
See page 6.
(Top View)
FS[1]
7
VC 1
6
VDD
OE 2
5 CLK–
GND 3
8
4 CLK+
FS[0]
OE
Vc
PPoowweerr SSuuppppl yl y FFi litlet erri ningg
Fixed
Frequency
O scillator
ADC
Any Frequency
10–810 MHz
DSPLL
C lock Synthesis
C o n tro l
CLK+
CLK-
Rev. 1.0 12/11
GND
FS0
FS1
Copyright © 2011 by Silicon Laboratories
Si597