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S1165 Datasheet, PDF (9/23 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.4.1_00
S-1165 Series
 Standard Circuit
Input
CIN*1
VIN VOUT
ON/OFF
VSS
Output
CL*2
Single GND
GND
*1. CIN is a capacitor for stabilizing the input.
*2. A tantalum capacitor (2.2 μF or more) can be used.
Figure 9
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
 Condition of Application
Input capacitor (CIN): 1.0 μF or more
Output capacitor (CL): 2.2 μF or more (tantalum capacitor)
Caution Generally a series regulator may cause oscillation, depending on the selection of external
parts. Check that no oscillation occurs with the application using the above capacitor.
Seiko Instruments Inc.
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