S1165 Datasheet, PDF (14/23 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT

HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1165 Series
Rev.4.1_00
 Precautions
• Wiring patterns for the VIN pin, the VOUT pin and GND should be designed so that the impedance is
low. When mounting an output capacitor between the VOUT pin and the VSS pin (C_L) and a capacitor
for stabilizing the input between the VIN pin and the VSS pin (C_IN), the distance from the capacitors to
these pins should be as short as possible.
• Note that generally the output voltage may increase when a series regulator is used at low load current
(1.0 mA or less).
• The S-1165 Series performs phase compensation by using an internal phase compensator and the ESR
of an output capacitor. Therefore, always place a capacitor of 2.2 μF or more between VOUT and VSS
pins. A tantalum type capacitor is recommended. Moreover, to secure stable operation of the S-1165
Series, it is necessary to employ a capacitor with an ESR within an optimum range (0.5 Ω to 5 Ω).
Using a capacitor whose ESR is outside the optimum range (approximately 0.5 Ω to 5 Ω), whether larger
or smaller, may cause an unstable output, resulting in oscillation. Perform sufficient evaluation under
the actual usage conditions for selection, including evaluation of temperature characteristics.
• The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitance is small or an input capacitor is not connected.
• Overshoot may occur in the output voltage momentarily if the voltage is rapidly raised at power-on or
when the power supply fluctuates. Sufficiently evaluate the output voltage at power-on with the actual
device.
• The application conditions for the input voltage, the output voltage, and the load current should not
exceed the package power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
• In determining the output current, attention should be paid to the output current value specified in Table
4 in “ Electrical Characteristics” and footnote *5 of the table.
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
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Seiko Instruments Inc.