S-5725CNBL9-M3T1U Datasheet, PDF (9/31 Pages) Seiko Instruments Inc – HIGH-SPEED BIPOLAR HALL EFFECT LATCH

Rev.2.5_01
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
S-5725 Series
 Electrical Characteristics
1. Product without power-down function
1. 1 S-5725CxBxx
Table 9
Item
Power supply voltage
Current consumption
Output voltage
Leakage current
Awake mode time
Symbol
(Ta = +25°C, VDD = 5.0 V, VSS = 0 V unless otherwise specified)
Condition
Min.
Typ.
Max.
Unit
Test
Circuit
VDD
−
IDD Average value
2.7 5.0 5.5
V
−
− 13.0 20.0 μA
1
Nch open-drain output
product
Output transistor Nch,
IOUT = 2 mA
−
−
0.4
V
2
VOUT
CMOS output product
Output transistor Nch,
IOUT = 2 mA
Output transistor Pch,
IOUT = −2 mA
−
−
VDD −
0.4
−
0.4
−
V
V
2
3
ILEAK
Nch open-drain output product
Output transistor Nch, VOUT = 5.5 V
−
−
1
μA
4
tAW
−
− 0.05 −
ms
−
Sleep mode time
tSL
−
− 6.00 −
ms
−
Operating cycle
tCYCLE tAW + tSL
− 6.05 12.00 ms
−
1. 2 S-5725DxBxx
Table 10
Item
Power supply voltage
Current consumption
Output voltage
Leakage current
Awake mode time
Symbol
(Ta = +25°C, VDD = 5.0 V, VSS = 0 V unless otherwise specified)
Condition
Min.
Typ.
Max.
Unit
Test
Circuit
VDD
−
2.7 5.0 5.5
V
−
IDD Average value
− 60.0 90.0 μA
1
Nch open-drain output
product
Output transistor Nch,
IOUT = 2 mA
−
−
0.4
V
2
VOUT
CMOS output product
Output transistor Nch,
IOUT = 2 mA
Output transistor Pch,
IOUT = −2 mA
−
−
VDD −
0.4
−
0.4
−
V
V
2
3
ILEAK
Nch open-drain output product
Output transistor Nch, VOUT = 5.5 V
−
−
1
μA
4
tAW
−
− 0.05 −
ms
−
Sleep mode time
tSL
−
− 1.20 −
ms
−
Operating cycle
tCYCLE tAW + tSL
− 1.25 2.50 ms
−
9