S-13A1 Datasheet, PDF (34/74 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR

HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-13A1 Series
Rev.2.1_00
9. Externally setting output voltage (HSOP-8A, HSOP-6, SOT-89-5 only)
The S-13A1 Series provides the types in which output voltage can be set via the external resistor. The output voltage
can be set by connecting a resistor (R_a) between the VOUT pin and the VADJ pin, and a resistor (R_b) between the
VADJ pin and the VSS pin.
The output voltage is determined by the following formulas.
V_OUT = 1.0 + R_a × l_a ······················ (1)
By substituting I_a = I_VADJ + 1.0 / R_b to above formula (1),
V_OUT = 1.0 + R_a × (I_VADJ + 1.0 / R_b) = 1.0 × (1.0 + R_a / R_b) + R_a × I_VADJ ········· (2)
In above formula (2), R_a × I_VADJ is a factor for the output voltage error.
Whether the output voltage error is minute is judged depending on the following (3) formula.
By substituting I_VADJ = 1.0 / R_VADJ to R_a × I_VADJ
V_OUT = 1.0 × (1.0 + R_a / R_b) + 1.0 × R_a / R_VADJ ···················(3)
If R_VADJ is sufficiently larger than R_a, the error is judged as minute.
VIN
I_VADJ
VOUT
I_a
VADJ
R_VADJ ^Ib
VSS
R_a
1.0 V
R_b
V_OUT
Figure 34
The following expression is in order to determine output voltage V_OUT = 3.0 V.
If resistance R_b = 2 kΩ, substitute R_VADJ = 400 kΩ typ. into (3),
Resistance R_a = (3.0 / 1.0 − 1) × ((2 k × 400 k) / (2 k + 400 k)) ≅ 4.0 kΩ
Caution The above connection diagrams and constants will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constants.
34