S-13A1 Datasheet, PDF (25/74 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR

HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-13A1 Series
 Standard Circuits
1. Types in which output voltage is internally set (S-13A1x10 to S-13A1x35)
Input
C_IN^*1
VIN
VOUT
Output
ON / OFF SSC^*4
VSS
C_SS^*3
C_L^*2
Single GND
GND
*1. C_IN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 2.2 μF or more can be used as C_L.
*3. A ceramic capacitor of 22 nF or less can be used as C_SS.
*4. HSOP-8A, HSOP-6, SOT-89-5 only.
Figure 26
2. Types in which output voltage is externally set (S-13A1x00, HSOP-8A, HSOP-6, SOT-89-5 only)
Input
C_IN^*1
VIN
VOUT
ON / OFF VADJ
VSS
Output
R_a^*3
R_b^*3
C_L^*2
Single GND
GND
*1. C_IN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 2.2 μF or more can be used as C_L.
*3. Resistor of 0.1 kΩ to 606 kΩ as R_a, 2 kΩ to 200 kΩ as R_b can be used.
Figure 27
Caution The above connection diagram and constant will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constant.
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