S-13D1 Datasheet, PDF (16/45 Pages) Seiko Instruments Inc – SUPER-SMALL PACKAGE 2-CIRCUIT BUILT-IN DELAY FUNCTION HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR

SUPER-SMALL PACKAGE 2-CIRCUIT BUILT-IN DELAY FUNCTION HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-13D1 Series
Rev.1.3_01
 Condition of Application
Input capacitor (CIN):
0.22 μF or more
Output capacitors (CL1, CL2): 0.22 μF or more
Caution Generally a series regulator may cause oscillation, depending on the selection of external parts.
Confirm that no oscillation occurs in the application for which the above capacitors are used.
 Selection of Input and Output Capacitors (CIN, CL1, CL2)
The S-13D1 Series requires an output capacitor between the VOUT pin and the VSS pin for phase compensation.
Operation is stabilized by a ceramic capacitor with an output capacitance of 0.22 μF or more over the entire temperature
range. When using an OS capacitor, a tantalum capacitor, or an aluminum electrolytic capacitor, the capacitance must
be 0.22 μF or more.
The value of the output overshoot or undershoot transient response varies depending on the value of the output
capacitor. The required capacitance of the input capacitor differs depending on the application.
The recommended capacitance for an application is CIN ≥ 0.22 μF, CL1 ≥ 0.22 μF, CL2 ≥ 0.22 μF; however, when
selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature characteristics, on the
actual device.
 Explanation of Terms
1. Low dropout voltage regulator
This voltage regulator has the low dropout voltage due to its built-in low on-resistance transistor.
2. Output voltage (VOUT)
The accuracy of the output voltage is ensured at ±1.0% or ±15 mV^*1 under the specified conditions of fixed input
voltage^*2, fixed output current, and fixed temperature.
*1. When VOUT < 1.5 V: ±15 mV, When VOUT ≥ 1.5 V: ±1.0%
*2. Differs depending on the product.
Caution If the above conditions change, the output voltage value may vary and exceed the accuracy range
of the output voltage. Refer to " Electrical Characteristics (per Circuit)" and " Characteristics
(Typical Data) (per Circuit)" for details.
3.
Line regulation
 ^ΔVOUT1 
ΔVIN•VOUT 
Indicates the dependency of the output voltage on the input voltage. That is, the values show how much the output
voltage changes due to a change in the input voltage with the output current remaining unchanged.
4. Load regulation (ΔVOUT2)
Indicates the dependency of the output voltage on the output current. That is, the values show how much the output
voltage changes due to a change in the output current with the input voltage remaining unchanged.
5. Dropout voltage (Vdrop)
Indicates the difference between input voltage (VIN1) and the output voltage when; decreasing input voltage (VIN)
gradually until the output voltage has dropped out to the value of 98% of output voltage (VOUT3), which is at
VIN = VOUT(S) + 1.0 V.
Vdrop = VIN1 − (VOUT3 × 0.98)
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