S-24C02BPPHL Datasheet, PDF (15/39 Pages) Seiko Instruments Inc – 2-WIRE CMOS SERIAL E2PROM

Rev.2.2_00
2-WIRE CMOS SERIAL E²PROM
S-24C02BPPHL
7. Read
7.1 Current address read
The E²PROM holds the last accessed memory address during both writing and reading. The memory
address is retained as long as the power voltage is the retention voltage V_AH or more. Accordingly, when
the master device recognizes the position of the address pointer inside the E²PROM, data can be read from
the memory address of the current address pointer without specifying a word address. This is called
“Current Address Read”.
“Current Address Read” is explained for when the address counter inside the E²PROM is address “n”.
When the E²PROM receives a 7-bit device address and the 1-bit read/write instruction code “1”, following
the start condition signal, it outputs the acknowledge signal.
Next, 8-bit data at address “n” is output from the E²PROM, in synchronization with the SCL clock.
The address counter is incremented to address n + 1 at the falling edge of the SCL clock at which the 8th
bit of data is output. The master device does not output the acknowledge signal and transmits the stop
condition signal to finish reading.
S
T
R
A
E
R
DEVICE
A
T
ADDRESS
D
NO ACK from
master device
S
T
O
P
SDA line
1 0 1 0 X X X 1 D7 D6 D5 D4 D3 D2 D1 D0
M
LR A
DATA
S
S/ C
B
BW K
Figure 13 Current Address Read
ADR INC
For recognition of the address pointer inside the E²PROM, take into consideration the following:
The memory address counter inside the E²PROM is automatically incremented for every falling edge of the
SCL clock at which the 8th bit of data is output during reading. During writing, the higher bits of the memory
address (higher 5 bits of the word address) are left unchanged and are not incremented at any falling of the
SCL clock when the 8th bit of the write data is received.
Seiko Instruments Inc.
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