S-8264AAA-I8T1U Datasheet, PDF (13/36 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC FOR 2-SERIAL

Rev.4.2_02
BATTERY PROTECTION IC FOR 2-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8264A/B/C Series
(6) Test Condition 6, Test Circuit 2
Set V1, V2, V3, and V4 to 3.5 V and V5 to 0 V. The CTL input “H” voltage (V_CTLH) is the maximum voltage of V5 when
CO is “L” after V5 has been gradually increased. Next, set V5 to 14 V. The CTL input “L” voltage (V_CTLL) is the minimum
voltage of V5 when CO is “H” after V5 has been gradually decreased.
(7) Test Condition 7, Test Circuit 4
The current consumption during operation (I_OPE) is the total of the currents that flow in the VDD pin and SENSE pin
when V1, V2, V3, and V4 are set to 3.5 V.
The current consumption during overdischarge (I_OPED) is the total of the currents that flow in the VDD pin and SENSE
pin when V1, V2, V3, and V4 are set to 2.3 V.
(8) Test Condition 8, Test Circuit 5
The SENSE pin current (I_SENSE) is I1, the VC1 pin current (I_VC1) is I2, the VC2 pin current (I_VC2) is I3, the VC3 pin current
(I_VC3) is I4, and the CTL pin “H” current (I_CTLH) is I5 when V1, V2, V3, and V4 are set to 3.5 V, and V5 to 14 V.
The CTL pin “L” current (I_CTLL) is I5 when V1, V2, V3, and V4 are set to 3.5 V and V5 to 0 V.
(9) Test Condition 9, Test Circuit 6
Set SW1 to OFF and SW2 to ON. The CO pin sink current (I_COL) is I2 when V1, V2, V3, and V4 are set to 3.5 V and V6
to 0.5 V.
Set SW1 and SW2 to OFF. Set V1 to V5, set V2, V3, and V4 to 3.0 V, and set V5 to 0.5 V. After t_CU has elapsed, set
SW1 to ON and SW2 to OFF. I1 is the CO pin source current (I_COH).
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