S-8249AAP-M6T1U Datasheet, PDF (13/22 Pages) Seiko Instruments Inc – VOLTAGE MONITORING IC WITH CELL BALANCING FUNCTION

Rev.1.2_00
VOLTAGE MONITORING IC WITH CELL BALANCING FUNCTION
S-8249 Series
5. DP pin
The S-8249 Series has the DP pin (Test mode switching pin). The S-8249 Series is set to test mode (used to
shorten the delay time) by inputting a voltage of V_DPH or higher to the DP pin.
DP Pin
Open (V_DP = V_SS)
"H" (V_DP ≥ V_DPH)
"L" (V_DP ≤ V_DPL)
Table 13
Status
Normal operation mode
Test mode
Normal operation mode
In test mode, the cell balancing detection delay time (t_BU) and overcharge detection delay time (t_CU) are
shortened to 1/64 of the delay time in the normal operation mode.
The DP pin is pulled down to V_SS by the internal resistor. When in a mode other than test mode, leave the DP
pin open or short it with V_SS.
13