S-8232 Datasheet, PDF (11/27 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK

Rev.5.4_00
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
(7) Test Condition 7, Test Circuit 4
Set S1 = ON, S2 = OFF, V1 = V2 = 3.6 V and V3 = 0 V under normal condition. Increase V4 from 0 V
gradually. The V4 voltage when I1 = 10 µA is the CO “H” voltage (V_CO(H)).
Set S1 = OFF, S2 = ON, V1 = V2 = 4.7, V3 = 0 V, and V5 = 9.4 V under over voltage condition. (V5) / I2
is the CO pin internal resistance (RCO(L)).
(8) Test Condition 8, Test Circuit 5
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal condition. Increase V1 from (V_CU1 − 0.2 V) to (V_CU1 +
0.2 V) immediately (within 10 µs). The time after V1 becomes (V_CU1 + 0.2 V) until CO goes “L” is the
overcharge detection delay time 1 (t_CU1).
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal condition. Decrease V1 from (V_DD1 + 0.2 V) to (V_DD1 −
0.2 V) immediately (within 10 µs). The time after V1 becomes (V_DD1 − 0.2 V) until DO goes “L” is the
overdischarge detection delay time 1 (t_DD1).
(9) Test Condition 9, Test Circuit 5
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal condition. Increase V2 from (V_CU2 − 0.2 V) to (V_CU2 +
0.2 V) immediately (within 10 µs). The time after V2 becomes (V_CU2 + 0.2 V) until CO goes “L” is the
overcharge detection delay time 2 (t_CU2).
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal condition. Decrease V2 from (V_DD2 + 0.2 V) to (V_DD2 −
0.2 V) immediately (within 10 µs). The time after V2 becomes (V_DD2 − 0.2 V) until DO goes “L” is the
overdischarge detection delay time 2 (t_DD2).
(10) Test Condition 10, Test Circuit 5
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal condition. Increase V3 from 0 V to 0.5 V immediately
(within 10 µs). The time after V3 becomes 0.5 V until DO goes “L” is the overcurrent detection delay time
1 (t_IOV1).
(11) Test Condition 11, Test Circuit 6
Set V1 = V2 = 0 V, and V3 = 0 V, and increase V3 gradually. The V3 voltage when CO = “L” (V_VM + 0.3 V
or higher) is the 0 V charge starting voltage (V_0CHA).
(12) Test Condition 12, Test Circuit 6
Set V1 = 0 V, V2 = 3.6 V, and V3 = 12 V, and increase V1 gradually. The V1 voltage when CO = “H” (V_VM
+ 0.3 V or higher) is the 0 V charge inhibiting voltage 1 (V_0INH1).
(13) Test Condition 13, Test Circuit 6
Set V1 = 3.6 V, V2 = 0 V, and V3 = 12 V, and increase V2 gradually. The V2 voltage when CO = “H” (V_VM
+ 0.3 V or higher) is the 0 V charge inhibiting voltage 2 (V_0INH2).
Seiko Instruments Inc.
11