HYM64V2005GU-50 Datasheet, PDF (8/14 Pages) Siemens Semiconductor Group – 3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module

HYM 64(72)V2005GU-50/-60
2M x 64/72 DRAM Module
DC Characteristics (contd’ )
T_A = 0 to 70 °C; V_CC = 3.3 V ± 0.3 V
Parameter
Symbol
x 64
min. max.
Average V_CC supply current:
I_CC1
-50 version
-60 version
–
960
–
880
x 72
Unit Note
min. max.
s
–
1080 mA ^{2) 3)}
–
990 mA ⁴⁾
(RAS, CAS, address cycling,
t_RC = t_RC min.)
Standby V_CC supply current
I_CC2
(RAS = CAS = V_IH, one address change)
Average V_CC supply current during RAS I_CC3
only refresh cycles:
-50 version
-60 version
–
16
–
18 mA –
2) 4)
–
960
– 1080 mA
–
880
–
990 mA
(RAS cycling, CAS = V_IH , t_RC = t_RC min.)
Average V_CC supply current during
I_CC4
hyper page mode (EDO):
-50 version
-60 version
–
320
–
360 mA ^{2) 3)}
–
280
–
315 mA ⁴⁾
(RAS = V_IL, CAS, address cycling
t_PC = t_PC min.)
Standby V_CC supply current
I_CC5
(RAS = CAS = V_CC – 0.2 V, one address
change)
Average V_CC supply current during
I_CC6
CAS-before-RAS refresh mode:
-50 version
-60 version
–
8
–
9 mA –
–
960
–
1080 mA ^{2) 4)}
–
880
–
990 mA
(RAS, CAS cycling, t_RC = t_RC min.)
Semiconductor Group
8