HYM64V2005GU-50 Datasheet, PDF (10/14 Pages) Siemens Semiconductor Group – 3.3V 2M x 64-Bit EDO-DRAM Module 3.3V 2M x 72-Bit EDO-DRAM Module

HYM 64(72)V2005GU-50/-60
2M x 64/72 DRAM Module
AC Characteristics (contd’ ) ⁵⁾⁶⁾
T_A = 0 to 70 °C,V_CC = 3.3 V ± 0.3 V, t_T = 2 ns
Parameter
Symbol
Limit Values
Unit
-50
-60
min. max. min. max.
Data to CAS low delay
Data to OE low delay
CAS high to data delay
OE high to data delay
t_DZC
0
–
0
–
ns
t_DZO
0
–
0
–
ns
t_CDD
10
–
13
–
ns
t_ODD
10
–
13
–
ns
16E
Note
13
13
14
14
Write Cycle
Write command hold time
Write command pulse width
Write command setup time
Write command to RAS lead time
Write command to CAS lead time
Data setup time
Data hold time
t_WCH
8
–
t_WP
8
–
t_WCS
0
–
t_RWL
13
–
t_CWL
13
–
t_DS
0
–
t_DH
8
–
10
–
10
–
0
–
15
–
15
–
0
–
10
–
ns
ns
ns
15
ns
ns
ns
16
ns
16
Read-modify-Write Cycle
Read-write cycle time
RAS to WE delay time
CAS to WE delay time
Column address to WE delay time
OE command hold time
t_RWC
t_RWD
t_CWD
t_AWD
t_OEH
113 –
64
–
27
–
39
–
10
–
138 –
77
–
32
–
47
–
13
–
ns
ns
15
ns
15
ns
15
ns
Hyper Page Mode (EDO) Cycle
Hyper page mode (EDO) cycle time t_HPC
20
–
25
–
ns
CAS precharge time
t_CP
8
–
10
–
ns
Access time from CAS precharge
t_CPA
–
27
–
32
ns
7
Output data hold time
t_COH
5
–
5
–
ns
RAS pulse width in EDO mode
t_RAS
50
200k 60
200k ns
CAS precharge to RAS Delay
t_RHPC 27
–
32
–
ns
OE setup time prior to CAS
t_OES
5
–
5
– ns
Semiconductor Group
10