HYB314405BJBJL-50- Datasheet, PDF (8/25 Pages) Siemens Semiconductor Group – 1M x 4-Bit Dynamic RAM

HYB 314405BJ/BJL-50/-60/-70
3.3V 1M x 4 EDO - DRAM
AC Characteristics (cont’d) ⁵⁾⁶⁾
T_A = 0 to 70 ˚C, V_CC = 3.3 V ± 0.3 V, t_T = 2 ns
Parameter
Symbol
Limit Values
Unit Note
-50
-60
-70
min. max. min. max. min. max.
Write command setup time
t_WCS
0
–
Write command to RAS lead time t_RWL 13 –
Write command to CAS lead time t_CWL 13 –
Data setup time
t_DS
0
–
Data hold time
t_DH
8
–
0
–
15 –
15 –
0
–
10 –
0
–
17 –
17 –
0
–
12 –
ns 15
ns
ns
ns 16
ns 16
Read-modify-Write Cycle
Read-write cycle time
RAS to WE delay time
CAS to WE delay time
Column address to WE delay
time
OE command hold time
t_RWC
t_RWD
t_CWD
t_AWD
t_OEH
118 –
64 –
27 –
39 –
10 –
138 –
77 –
32 –
47 –
13 –
162 –
89 –
36 –
54 –
15 –
ns
ns 15
ns 15
ns 15
ns
Hyper Page Mode (EDO) Cycle
Hyper page mode (EDO) cycle t_HPC 20 –
25 –
30 –
ns
time
CAS precharge time
Access time from CAS
precharge
t_CP
8
–
10 –
10 –
ns
t_CPA
–
27 –
32 –
37 ns 7
Output data hold time
t_COH
RAS pulse width in hyper page t_RAS
mode
5
–
5
–
5
–
ns
50 200 k 60 200 k 70 200 k ns
CAS precharge to RAS Delay
t_RHCP
27
–
32 –
37 –
ns
Hyper Page Mode (EDO) Read-modify-Write Cycle
Hyper page mode (EDO) read- t_PRWC 58 –
68 –
77 –
ns
write cycle time
CAS precharge to WE
t_CPWD 41
–
49 –
56 –
ns
Semiconductor Group
8