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HYB314405BJBJL-50- Datasheet, PDF (7/25 Pages) Siemens Semiconductor Group – 1M x 4-Bit Dynamic RAM
HYB 314405BJ/BJL-50/-60/-70
3.3V 1M x 4 EDO - DRAM
AC Characteristics (cont’d) 5)6)
TA = 0 to 70 ˚C, VCC = 3.3 V ± 0.3 V, tT = 2 ns
Parameter
Symbol
Limit Values
Unit Note
-50
-60
-70
min. max. min. max. min. max.
RAS hold time
CAS hold time
CAS to RAS precharge time
Transition time (rise and fall)
tRSH
13
15 –
17 –
ns
tCSH
50
60 –
70 –
ns
tCRP
5
tT
1
–5
50 1
–
5
50 1
–
ns
50 ns 7
Refresh period
Refresh period for L-version
tREF
–
16 –
16 –
16 ms
tREF
–
128 –
128 –
128 ms
Read Cycle
Access time from RAS
tRAC
Access time from CAS
tCAC
Access time from column
tAA
address
OE access time
tOEA
Column address to RAS lead
tRAL
time
Read command setup time
tRCS
Read command hold time
tRCH
Read command hold time
tRRH
referenced to RAS
CAS to output in low-Z
tCLZ
Output buffer turn-off delay
tOFF
Output buffer turn-off delay from tOEZ
OE
Data to CAS low delay
tDZC
Data to OE low delay
tDZO
CAS high to data delay
tCDD
OE high to data delay
tODD
–
50 –
60 –
70 ns 8, 9
–
13 –
15 –
17 ns 8, 9
–
25 –
30 –
35 ns 8,10
–
13 –
15 –
17 ns
25 –
30 –
35 –
ns
0
–
0
–
0
–
ns
0
–
0
–
0
–
ns 11
0
–
0
–
0
–
ns 11
0
–
0
–
0
–
ns 8
0
13 0
15 0
17 ns 12
0
13 0
15 0
17 ns 12
0
–
0
–
10 –
10 –
0
–
0
–
13 –
13 –
0
–
0
–
15 –
15 –
ns 13
ns 13
ns 14
ns 14
Write Cycle
Write command hold time
Write command pulse width
tWCH
8
–
10 –
10 –
ns
tWP
8
–
10 –
10 –
ns
Semiconductor Group
7