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HYB314405BJBJL-50- Datasheet, PDF (1/25 Pages) Siemens Semiconductor Group – 1M x 4-Bit Dynamic RAM | |||
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1M x 4-Bit Dynamic RAM
(Hyper Page Mode (EDO) version)
HYB 314405BJ/BJL-50/-60/-70
Advanced Information
⢠1 048 576 words by 4-bit organization
⢠0 to 70 ËC operating temperature
⢠Hyper Page Mode - EDO
⢠Performance:
tRAC RAS access time
tCAC CAS access time
tAA
Access time from address
tRC
Read/Write cycle time
tHPC Hyper page mode (EDO)
cycle time
-50 -60 -70
50 60 70 ns
13 15 20 ns
25 30 35 ns
89 104 124 ns
20 25 30 ns
⢠Single + 3.3 V (± 0.3 V) supply
⢠Low power dissipation
max. 252 mW active (-50 version)
max. 216 mW active (-60 version)
max. 198 mW active (-70 version)
⢠Standby power dissipation:
7.2 mW max. standby (LVTTL)
3.6 mW max. standby (LVCMOS)
720 µW max. standby (LVCMOS) for Low Power Version
⢠Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh,
hidden refresh and test mode capability
⢠All inputs and outputs LVTTL compatible
⢠1024 refresh cycles / 16 ms
⢠1024 refresh cycles / 128 ms for Low Power Version
⢠Plastic Packages: P-SOJ-26/20-5 with 300 mil width
Semiconductor Group
1
4.96
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