HYB314405BJBJL-50- Datasheet, PDF (6/25 Pages) Siemens Semiconductor Group – 1M x 4-Bit Dynamic RAM

HYB 314405BJ/BJL-50/-60/-70
3.3V 1M x 4 EDO - DRAM
DC Characteristics (cont’d)
T_A = 0 to 70 ˚C, V_SS = 0 V, V_CC = 3.3 V ± 0.3 V, t_T = 2 ns
Parameter
Symbol
Limit Values
min.
max.
Standby V_CC supply current
(RAS = CAS = WE = V_CC – 0.2 V)
Average V_CC supply current during
CAS before RAS refresh mode
-50 version
-60 version
-70 version
I_CC5
–
I_CC6
1
200
–
70
–
60
–
55
For Low Power Version only:
I_CC7
–
250
Battery backup current (average power supply
current in battery backup mode):
(CAS = CAS before RAS cycling or 0.2 V,
WE = V_CC – 0.2 V or 0.2 V,
A0 to A10 = V_CC – 0.2 V or 0.2 V;
DI = V_CC – 0.2 V or 0.2 V or open,
t_RC = 125 µs, t_RAS = t_RAS min = 1 µs)
Unit Test
Condition
mA ¹⁾
µA L-version
mA ²⁾⁴⁾
µA –
AC Characteristics ⁵⁾⁶⁾
T_A = 0 to 70 ˚C, V_CC = 3.3 V ± 0.3 V, t_T = 2 ns
Parameter
Symbol
Limit Values
Unit Note
-50
-60
-70
min. max. min. max. min. max.
Common Parameters
Random read or write cycle time t_RC
RAS precharge time
t_RP
RAS pulse width
t_RAS
CAS pulse width
t_CAS
Row address setup time
t_ASR
Row address hold time
t_RAH
Column address setup time
t_ASC
Column address hold time
t_CAH
RAS to CAS delay time
t_RCD
RAS to column address delay t_RAD
time
89 –
104 –
124 –
ns
35 –
40 –
50 –
ns
50 10 k 60 10 k 70 10 k ns
8
10 k 10 10 k 12 10 k ns
0
–
0
–
0
–
ns
8
–
10 –
10 –
ns
0
–
0
–
0
–
ns
8
–
10 –
12 –
ns
12 37 14 45 14 53 ns
10 25 12 30 12 35 ns
Semiconductor Group
6