HYS64V2100G Datasheet, PDF (7/12 Pages) Siemens Semiconductor Group – 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module

HYS64(72)V2100G(C)U-10
2M x 64/72 SDRAM-Module
AC Characteristics 3)4)
T_A = 0 to 70 °C; V_SS = 0 V; V_CC = 3.3 V ± 0.3 V, t_T = 1 ns
Parameter
Symbol
Limit Values
-10
min
max
Unit Note
Clock and Clock Enable
Clock Cycle Time
t_CK
CAS Latency = 3
10
ns
CAS Latency = 2
15
ns
CAS Latency = 1
30
ns
System Frequency
f_CK
CAS Latency = 3
CAS Latency = 2
CAS Latency = 1
–
100 MHz
–
66 MHz
–
33 MHz
Clock Access Time
t_AC
CAS Latency = 3
CAS Latency = 2
CAS Latency = 1
–
8
ns ⁵
–
9
ns
–
27 ns
Clock High Pulse Width
t_CH
3.5
Clock Low Pulse Width
t_CL
3.5
CKE Setup Time
t_CKS
3
CKE Hold Time
t_CKH
1
CKE Setup Time (Power down mode) t_CKSP
3
CKE Setup Time (Self Refresh Exit) t_CKSR
8
Transition time (rise and fall)
t_T
1
–
ns
–
ns
–
ns 6
–
ns 6
–
ns 6
–
ns 8
30 ns
Common Parameters
Command Setup time
Command Hold Time
Address Setup Time
Address Hold Time
RAS to CAS delay
Cycle Time
Active Command Period
Precharge Time
t_CS
3
–
ns 6
t_CH
1
–
ns 6
t_AS
3
–
ns 6
t_AH
1
–
ns 6
t_RCD
30
–
ns
t_RC
75
120k ns
t_RAS
45
120k ns
t_RP
30
–
ns
Semiconductor Group
7