HYS64V2100G Datasheet, PDF (11/12 Pages) Siemens Semiconductor Group – 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module

HYS64(72)V2100G(C)U-10
2M x 64/72 SDRAM-Module
SPD-Table (contd’ )
Byte#
Description
28 Minimum Row Active to Row Active delay
tRRD
29 Minimum RAS to CAS delay tRCD
30 Minimum RAS pulse width tRAS
31 Module Bank Density (per bank)
32-61 Superset information (may be used in
future)
62 SPD Revision
63 Checksum for bytes 0 - 62
64- Manufacturess’ information (optional)
127 (FFh if not used)
128+ Unused storage locations
SPD Entry Value
Hex
20 ns
x64 x72
14 14
30 ns
45 ns
16 MByte
1E 1E
2D 2D
04 04
FF FF
Revision 1
01 01
F3 05
FF FF
FF FF
L-DIM-168-27
SDRAM DIMM Module package
133,35
127,35
3,0
1 10 11
40 41
84
42,18
66,68
A
B
AC
85 94 95
124 125
168
6,35
2,0
Detail A
6,35
2,0
Detail B
1,27
1,0 +- 0.5
Detail C
0,2 +- 0,15
DM168-27.WMF(EWK)
Semiconductor Group
11