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HYM72V8025GS-50- Datasheet, PDF (7/11 Pages) Siemens Semiconductor Group – 8M x 72-Bit EDO- DRAM Module
HYM72V8025/35GS-50/-60
8M x 72-ECC EDO-Module
AC Characteristics (note: 5,6,7,8)
TA = 0 to 70 °C,VCC = 3.3 ± 0.3 V
Parameter
Symbol
-50
-60
Unit Note
min. max. min. max.
common parameters
Random read or write cycle time
tRC
RAS precharge time
tRP
RAS pulse width
tRAS
CAS pulse width
tCAS
Row address setup time
tASR
Row address hold time
tRAH
Column address setup time
tASC
Column address hold time
tCAH
RAS to CAS delay time
tRCD
RAS to column address delay time
tRAD
RAS hold time
tRSH
CAS hold time
tCSH
CAS to RAS precharge time
tCRP
Transition time (rise and fall)
tT
Refresh period
tREF
Read Cycle
Access time from RAS
tRAC
Access time from CAS
tCAC
Access time from column address
tAA
OE access time
tOEA
Column address to RAS lead time
tRAL
Read command setup time
tRCS
Read command hold time
tRCH
Read command hold time referenced tRRH
to RAS
CAS to output in low-Z
tCLZ
Output buffer turn-off delay
tOFF
84
–
104 – ns
30
–
40
– ns
50 100k 60 100k ns
8 10k 10 10k ns
5
–
5
– ns 9
6
–
8
–
ns 10
2
–
2
–
ns 11
13
–
15
–
ns 9
10 32 12 40
12
8
20 10 25 ns 12
18
–
20
–
ns 9
38
–
48
–
ns 10
10
–
10
–
ns 9
1
30
1
30 ns 7
–
64
–
64 ms
–
50
–
60 ns 13,14
–
18
–
20
ns 9,13,14
–
30
–
35
ns 9,13, 15
–
18
–
20 ns 9,13
30
–
35
–
ns 9
2
–
2
–
ns 11
2
–
2
–
ns 11,16
0
–
0
–
ns 16
2
–
2
–
ns 11,13
–
18
–
20 ns 9,17
Semiconductor Group
7