HYB3116400BJBTL-50- Datasheet, PDF (7/26 Pages) Siemens Semiconductor Group – 3.3V 4M x 4-Bit Dynamic RAM

HYB 3116(7)400BJ/BT(L) -50/-60/-70
3.3V 4Mx4-DRAM
DC Characteristics (values in brackets for HYB3117400)
T_A = 0 to 70 °C, V_SS = 0 V, V_CC = 3.3 V ± 0.3 V, t_T = 5 ns
Parameter
Symbol
Limit Values
min.
max.
Unit Test
Condition
Average V_CC supply current, during RAS-only I_CC3
refresh cycles:
-50 ns version
–
-60 ns version
–
-70 ns version
–
100(120) mA ^{2) 4)}
90 (110) mA ^{2) 4)}
80 (100) mA ^{2) 4)}
(RAS cycling: CAS = V_IH, t_RC = t_RC min.)
Average V_CC supply current,
I_CC4
during fast page mode: -50 ns version
–
-60 ns version
–
-70 ns version
–
40 (40)
35 (35)
30 (30)
mA ^{2) 3) 4)}
mA ^{2) 3) 4)}
mA ^{2) 3) 4)}
(RAS = V_IL, CAS, address cycling, t_PC = t_PC min.)
Standby V_CC supply current
(RAS = CAS = V_CC – 0.2 V)
I_CC5
–
Average V_CC supply current, during CAS-
I_CC6
before-RAS refresh mode: -50 ns version
–
-60 ns version
–
-70 ns version
–
1
mA ¹⁾
200
µA L-version
100(120) mA ^{2) 4)}
90 (110) mA ^{2) 4)}
80 (100) mA ^{2) 4)}
(RAS, CAS cycling, t_RC = t_RC min.)
Average Self Refresh Current
I_CC7
_
(CBR cylce with tRAS>TRASSmin., CAS held low,
WE=Vcc-0.2V, Address and Din=Vcc-0.2V or 0.2V)
1
mA
250
µA L-version
Capacitance
T_A = 0 to 70 °C,V_CC = 3.3 V ± 0.3V, f = 1 MHz
Parameter
Input capacitance (A0 to A10, A11)
Input capacitance (RAS, CAS, WE, OE)
I/O capacitance (I/O1 - I/O4)
Symbol
C_I1
C_I2
C_IO
Limit Values
min.
max.
–
5
–
7
–
7
Unit
pF
pF
pF
Semiconductor Group
7