C515C Datasheet, PDF (62/69 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

C515C
SSC Interface Characteristics
Parameter
Clock Cycle Time : Master Mode
Slave Mode
Clock high time
Clock low time
Data output delay
Data output hold
Data input setup
Data input hold
TC bit set delay
Symbol
min.
t_SCLK
0.4
t_SCLK
1.0
t_SCH
360
t_SCL
360
t_D
–
t_HO
0
t_S
100
t_HI
100
t_DTC
–
Limit Values
max.
–
–
–
–
100
–
–
–
8 CLP
Unit
µs
µs
ns
ns
ns
ns
ns
ns
ns
External Clock Drive at XTAL2
Parameter
Oscillator period
High time
Low time
Rise time
Fall time
Oscillator duty cycle
Clock cycle
Symbol CPU Clock = 10 MHz Variable CPU Clock Unit
Duty cycle 0.4 to 0.6 1/CLP = 2 to 10 MHz
min.
max.
min.
max.
CLP
100
100
100
500
ns
TCL_H 40
–
40
CLP-TCL_L ns
TCL_L
40
–
40
CLP-TCL_H ns
t_R
–
12
–
12
ns
t_F
–
12
–
12
ns
DC
0.4
0.6
40 / CLP
1 - 40 / CLP –
TCL
40
60
CLP * DC_min CLP * DC_max ns
Note: The 10 MHz values in the tables are given as an example for a typical duty cycle variation of
the oscillator clock from 0.4 to 0.6.
Semiconductor Group
62
1997-07-01