HYB314175BJ-50- Datasheet, PDF (6/24 Pages) Siemens Semiconductor Group – 3.3V 256 K x 16-Bit EDO-DRAM 3.3V 256 K x 16-Bit EDO-DRAM Low power version with Self Refresh

HYB 314175BJ/BJL-50/-55/-60
3.3V 256K x 16 EDO-DRAM
DC Characteristics (cont’d)
Parameter
Average V_CC supply current during
hyper page mode (EDO) operation:
-50 version
-55 version
-60 version
Standby V_CC supply current
(RAS = LCAS = UCAS = WE = V_CC – 0.2 V)
Average V_CC supply current during
CAS-before-RAS refresh mode:
-50 version
-55 version
-60 version
Symbol Limit Values
min.
max.
–
I_CC4
115
115
100
I_CC5
–
1
–
I_CC6
125
120
105
Unit Test
Condition
2, 3, 4
mA
mA 1
2, 4
mA
Standby V_CC current (L-version)
I_CC5
–
(RAS = LCAS = UCAS = WE = V_CC – 0.2 V)
Self Refresh Current (L-version)
(RAS, LCAS, UCAS = 0.2V
A0 – A8 = V_CC – 0.2 V or 0.2 V)
I_CCS
–
200
µA
250
µA
Capacitance
T_A = 0 to 70 °C; V_CC = 3.3 V ± 0.3 V, f = 1 MHz
Parameter
Symbol
Limit Values
Unit
min.
max.
Input capacitance (A0 to A8)
C_I1
–
5
pF
Input capacitance (RAS, UCAS, LCAS, WE, OE) C_I2
–
7
pF
Output capacitance (l/O1 to l/O16)
C_IO
–
7
pF
Semiconductor Group
6