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C504 Datasheet, PDF (27/49 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller
C504
The A/D converter uses two clock signals for operation : the conversion clock fADC (= 1/ tADC) and
the input clock fIN (= 1/ tIN). Both clock signals are derived from the C504 system clock fOSC which
is applied at the XTAL pins. The duration of an A/D conversion is a multiple of the period of the fIN
clock signal. The table in figure 10 shows the prescaler ratios and the resulting A/D conversion
times which must be selected for typical system clock rates.
MCU System Clock fIN
Rate (fOSC)
[MHz]
3.5 MHz
1.75
12 MHz
6
16 MHz
8
24 MHz
12
32 MHz
16
40 MHz
20
Ratio
÷4
÷4
÷4
÷8
÷8
÷ 16
Prescaler
fADC
ADCL1 ADCL0 [MHz]
0
0
.438
0
0
1.5
0
0
2
0
1
1.5
0
1
2
1
0
1.25
A/D Conversion
Time [µs]
48 x tIN = 27.4
48 x tIN = 8
48 x tIN = 6
96 x tIN = 8
96 x tIN = 6
192 x tIN = 9.6
Figure 10
A/D Converter Clock Selection
The analog inputs are located at port 1 and port 3 (4 lines on each port). The corresponding port 1
and port 3 pins have a port structure, which allows to use it either as digital I/Os or analog inputs.
The analog input function of these mixed digital/analog port lines is selected via the registers
P1ANA and P3ANA.
Semiconductor Group
27