HYS64-72V2200GU-8 Datasheet, PDF (14/17 Pages) Siemens Semiconductor Group – 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module

HYS64(72)V2200/4220GU-8/-10
SDRAM-Modules
SPD-Table (contd’ ):
Byte#
Description
29 Minimum RAS to CAS delay tRCD
30 Minimum RAS pulse width tRAS
31 Module Bank Density (per bank)
32 SDRAM input setup time
33 SDRAM input hold time
34 SDRAM data input setup time
35 SDRAM data input hold time
36-61 Superset information (may be used in
future)
62 SPD Revision
63 Checksum for bytes 0 - 62
64- Manufacturers information (optional)
125 (FFh if not used)
126 Frequency Specification
127 Details of 100 MHz Support
128+ Unused storage locations
SPD Entry Value
20 ns
45 ns
16 MByte
2 ns
1 ns
2 ns
1 ns
Hex
2Mx64 2Mx72 4Mx64 4Mx72
-8-3 -8-3 -8-3 -8-3
14
14
14
14
2D
2D
2D
2D
04
04
04
04
20
20
20
20
10
10
10
10
20
20
20
20
10
10
10
10
FF
FF
FF
FF
Revision 1.2
12
12
12
12
E7
F9
E8
FA
XX XX XX XX
100 MHz
64
64
64
64
AD AD FD FD
FF
FF
FF
FF
Semiconductor Group
14