HYS64V4120GU Datasheet, PDF (11/11 Pages) Siemens Semiconductor Group – 3.3V 4M x 64-Bit 2 BANK SDRAM Module 3.3V 4M x 72-Bit 2 BANK SDRAM Module

HYS64(72)V4120GU-10
4M x 64/72 SDRAM-Module
SPD-Table (contd’ ):
Byte#
Description
29 Minimum RAS to CAS delay tRCD
30 Minimum Ras pulse width tRAS
31 Module Bank Density (per bank)
32-61 Superset information (may be used in
future)
62 SPD Revision
63 Checksum for bytes 0 - 62
64- Manufacturess’ information (optional)
127 (FFh if not used)
128+ Unused storage locations
SPD Entry Value
30 ns
45 ns
16 MByte
Hex
x64 x72
-10 -10
1E 1E
2D 2D
04 04
FF FF
Revision 1
01 01
F4 06
FF FF
FF FF
L-DIM-168-25 HYS64(72)V4120GU-10
SDRAM DIMM Module package
133,35
127,35
x)
1 10 11
40 41
42,18
66,68
A
B
C
85 94 95
124 125
x)
4,0
84
168
6,35
2,0
Detail A
6,35
2,0
Detail B
1,27
1,0 +- 0.5
Detail C
0,2 +- 0,15
x) on ECC modules only
DM168-25.WMF
Semiconductor Group
11