ID242 Datasheet, PDF (9/33 Pages) Sharp Electrionic Components – Flash Memory Card

SHARP
ID242SERIESPRODUCTOVERVIEW
8
6. 1. 2 Erase
Erase is executed one block at a time. Erasable block size is 64K bytes in byte access mode and 128K bytes in
word access mode.
6. 1. 3 Address Decoding
The higher address area of ID242 series flash memory card which goes beyond common memory area is not
decoded in common memory access. It means that the system will access to random memory address of the
memory card even if system will try to access to the memory address which exceeds memory capacity of the card.
Please do not access to the memory address which goes beyond memory capacity of the card.
As an enhanced function, the memory card enables to output invalid data (either of OOOOhor FFFFh) when system
will access to the memory address which exceeds memory capacity of the card. Please contact our sales & market-
ing support to find concrete way of setting.
6.2 Attribute Memory
Figure 3 shows attribute memory map of ID242 series flash memory card. Attribute memory is contained within
the Card Control Logic. Attribute memory contains the Card Information Structure (CIS) and Component Man-
agement Registers (CMRs). The CIS contains tuple information and is located at even byte addresses beginning
with address OOOOh(Please refer to section 7). The standard CIS of ID242 series flash memory card is hardwired
and is for read only. As an enhanced function, the hardwired CIS area is switchable to EEPROM so that customer
can program required CIS. Please contact our sales & marketing support to find concrete way of setting. The
CMRs are located at even byte addresses beginning with address 4000h (Please refer to section 9).
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Address
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' 004200h
COMPONENT
MANAGEMENT
REGISTER_{_}S_004000h
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I 000200h
CARD
INFORMATION
STRUCTUREOOOOOOh
EVEN
F1003-01
Figure 3. Attribute Memory Map
CPSOOOZ-002@
May. 1998