LRS1381 Datasheet, PDF (68/114 Pages) Sharp Electrionic Components – STACKED CHIP 32M FLASH AND 4M SRAM

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Table 8. Identifier Codes and OTP Address for Read Operation on Partition Configuration⁽¹⁾ for 64M-bit device
Partition Configuration Register
Address (64M-bit device)
PCR.10
PCR.9
PCR.8
[A₂₁-A₁₆]
0
0
0
00H
0
0
1
00H or 10H
0
1
0
00H or 20H
1
0
0
00H or 30H
0
1
1
00H or 10H or 20H
1
1
0
00H or 20H or 30H
1
0
1
00H or 10H or 30H
1
1
1
00H or 10H or 20H or 30H
NOTES:
1. The address to read the identifier codes or OTP data is dependent on the partition which is selected when writing the Read
Identifier Codes/OTP command (90H).
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Appendix to Spec No.: MFM2-J13318 Model No.: LRS1381 March 16, 2001