LQ104V1DG51 Datasheet, PDF (12/21 Pages) Sharp Electrionic Components – TFT LCD MODULE

Horizontal
sync.
signal
(Hsync)
Clock signal
(CK)
TH
THp
0.3Vcc 0.3Vcc ^0.7Vcc
THc
Tc
* Only when enable terminal (ENAB) is fixed ^{Tch Tcl}
0.7Vcc
0.3Vcc 0.3Vcc 0.3Vcc
0.3Vcc
Data signal
(R0~R5,G0~G5,
B0~B5)
C1* _{N u} C_{m b}2_e *_{r o f c l o c k}C104*
Tds Tdh
Horizontal data invalid
period
0.7Vcc
D1
D2 D3 _{0 . 3 V c c}
Number of H-data
D639 D640
Horizontal data invalid
period
Data enable
signal
(ENAB)
THe
THd
0.7Vcc
Tes
Tep
0.3Vcc
0.3Vcc
Vertical
sync.
signal
(Vsync)
Horizontal
sync. signal
(Hsync)
Data signal
(R0~R5,G0~G5,
B0~B5)
0.7Vcc
TVh
0.7Vcc
TVp
0.3Vcc
TV
0.7Vcc
1
2
TVs
Vertical invalid data period
34
Number of line
TVd
DH1 DH2 DH3
FigF2i-g2.　2-I2npIuntp　utsisgignanla　l wwaavvefeofromrsm(4s0(04　0l0inlien　emode)
DH399 DH400 ^{Vertical invalid data period}
Number of V-data line