LQ035Q7DH06 Datasheet, PDF (11/26 Pages) Sharp Electrionic Components – TFT-LCD Module

LCP-05020-8
7-2) Timing Characteristics of input signals
Table 7 AC Characteristics (1)
(VSHA=+5V, VSHD=+3.3V, Ta=25℃)
Parameter
Symbol Min. Typ.
Max.
Unit
Remark
Clock frequency of source driver
fCK
4.5 －
6.8
MHz
Rising time of clock
Tcr
－－
20
ns
Falling time of clock
Tcf
－－
20
ns DCLK
Pulse width (High level)
Tcwh
40
－
－
ns
Pulse width (Low level)
Tcwl
40 －
－
ns
Frequency of start pulse
fsp
16.5 －
28
kHz
Setup time of start pulse Tsusp 15 －
－
ns SPL,SPR
Hold time of start pulse
Thsp
10
－
Source
Pulse width of start pulse Twsp
－
－
driver
Setup time of latch pulse Tsulp 20 －
－
1.5/fCK
－
ns
ns ^{【Note 7-7】}
ns
Hold time of latch pulse
Thlp
20 －
－
ns LP
Pulse width of latch pulse Twlp
60 －
－
ns
Setup time of PS
Tsups
0
－
－
μs
Setup time of PS
Hold time of PS
Tsulps
1
－
－
μs
PS
Thps
0
－
－
μs
Hold time of PS
Thlps 30 －
－
ns
Set up time of data
Tsud
15 －
－
ns R0～R5,G0～G5
Hold time of data
Thd
10 －
－
ns ^,B0～B5
Clock frequency
fcls
16.5 －
28
kHz
Pulse width of clock(Low) Twlcls
5
－ (1/fcls)-30 μs
Pulse width of clock(High) Twhcls 30 －
－
μs
Rising time of clock
Trcls
－
－
100
ns CLS
Falling time of clock
Tfcls
－
－
100
ns
Gate Setup time of clock
Tsucls
3
－
－
μs
driver Hold time of clock
Thcls
0
－
－
μs
Frequency of start pulse
fsps
58 －
86
Hz
Setup time of start pulse
Tsusps 100 －
－
ns
Hold time of start pulse
Thsps 300 －
－
ns SPS
Rising time of start pulse
Trsps
－
－
100
ns
Falling time of start pulse
Tfsps
－
－
100
ns
Vcom Setup time of Vcom
Tsuvcom 0
－
－
μs Vcom
Hold time of Vcom
Thvcom 1
－
－
μs
【Note 7-7】There must be only one up-edge of DCLK (includes Tsusp and Thsp time) in the period of
SPL=”Hi”.