GS6151 Datasheet, PDF (43/77 Pages) Semtech Corporation – Multi-Rate 6G UHD-SDI

EYE_MON_STATUS_REG_3 register. The phase to be measured is set by setting the
MANUAL_PHASE bit of EYE_MON_CONTROL_REG_5, and for arbitrary data the
EYE_MON_WINDOW setting of the EYE_MON_CONTROL_REG_6.
For arbitrary data patterns the EYE_MON_WINDOW setting sets which portion of the
eye is being measured. The result for any phase is the lesser result stored in
ERROR_COUNT of the measurements at each EYE_MON_WINDOW setting, 0 and 1.
For PRBS7 data only the MANUAL_PHASE bit needs to be set and the
EYE_MON_WINDOW bit can be arbitrarily set. The left and right portions of the eye are
overlapped (wrap around the bit map).
Resetting the error indicator to 0 is done by programming the EYE_MON_FORCE_CLEAR
and EYE_MON_CLEAR bits of the EYE_MON_CONTROL_REG_6 register to 1. Both bits
should be set to 0 before starting a new measurement.
4.12.1.3 Continuous Measurement
A manual continuous measurement can be used to continually count the number of
errors at a single phase until explicitly stopped by disabling the manual continuous
mode. A continuous measurement is started by first setting the MANUAL_PHASE bit of
EYE_MON_CONTROL_REG_5, and for arbitrary data the EYE_MON_WINDOW setting of
the EYE_MON_CONTROL_REG_6, then enabling the measurement by setting the
CONTINUOUS_SCAN_ENABLE bit of the EYE_MON_CONTROL_REG_0 register to 1
(enable measurement).
When it is desired to stop the measurement the CONTINUOUS_SCAN_ENABLE bit of the
EYE_MON_CONTROL_REG_0 register should be set to 0 (disable measurement). The
result, the number of errors counted, is stored in ERROR_COUNT bits of the
EYE_MON_STATUS_REG_3 register.
Resetting the error indicator to 0 is done by programming the EYE_MON_FORCE_CLEAR
and EYE_MON_CLEAR bits of the EYE_MON_CONTROL_REG_6 register to 1. Both bits
should be set to 0 before starting a new measurement.
4.12.2 PRBS Checker
PRBS7 data streams can be checked for bit-errors at both the input of the CDR (non
re-timed Trace EQ output) and output of the CDR (re-timed output). Although the
general sequence for checking the input and output of the CDR are similar, different
registers are used to program and check the results of each.
4.12.2.1 Input PRBS Checker
The Input PRBS checker checks the eye and/or counts bit errors at the Trace EQ
output/input to the CDR. This feature can be used to optimize the Trace EQ setting,
other upstream jitter optimizations or to simply check for error-free transmission to the
CDR. The operation of the Input PRBS checker is similar to the Horizontal Eye Monitor for
Arbitrary Data, in the previous section, providing the same functionality of automatic
eye monitoring, manual timed error checking at a single phase and continuous error
checking at a single phase. Because the same sequence and most of the same registers
GS6151
Final Data Sheet
PDS-060389
Rev.4
August 2015
www.semtech.com
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