GS6151 Datasheet, PDF (20/77 Pages) Semtech Corporation – Multi-Rate 6G UHD-SDI

60
55
SD-SDI
50
HD-SDI
45
3G-SDI
40
6G-SDI
35
30
0
1.485
2.97
4.455
5.94
Frequency (Gb/s)
Figure 4-2: LOS Threshold at 100mV Input Swing vs. SDI Data Rates for a Nominal
DEVICE_SPECIFIC_LOS_THRESHOLD of 53
Strength detection is unaffected by the Trace EQ settings in INPUT_CONTROL_REG_0.
When edge detection is used as the method of LOS detection the corresponding GPIO
pin will be HIGH (signal lost) when no transitions are detected on the selected input. The
corresponding GPIO pin will be LOW (signal present) when transitions are detected on
the input. The LOS status is also available through the LOS bit in the PLL_STATUS
register, and as a sticky status through the LOS_STICKY bit in the STICKY_STATUS
register at address 50_h.
4.3.2 Lock Detection
The GS6151 lock detection circuitry outputs a LOCKED status signal which indicates that
the CDR has achieved phase lock to the incoming data stream. The LOCKED signal is an
active HIGH output available to the application on either of the GPIO[0:1] multi-function
status and control pins. It is selected for output using the GPIO[0:1]_IO_SELECT and
GPIO[0:1]_SELECT bits accessible in the GPIO_CONTROL_REG_0 register. By default,
LOCKED is output on GPIO1.
The LOCKED status is also available from the LOCKED bit in the PLL_STATUS register,
and the LOCK_LOST_STICKY bit in the STICKY_STATUS register indicates whether lock
has been lost since the bit was last cleared.
GS6151
Final Data Sheet
PDS-060389
Rev.4
August 2015
www.semtech.com
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Semtech
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