GS2970 Datasheet, PDF (3/145 Pages) Semtech Corporation – 3Gb/s, HD, SD SDI Receiver Complete with SMPTE Audio and Video Processing

Functional Block Diagram
VBG
LB_CONT
LF
SDI
TERM
SDI
Crystal
Buffer/
Oscillator
GSPI and
JTAG Controller
Host
Interface
Buffer
Reclocker
with
Integrated
VCO
Serial
to
Parallel
Converter
Descramble,
Word Align,
Rate Detect
Video
Standard
Detect
TRS
Detect
Timing
Extraction
Audio
De-
Embedder,
Audio Clock
Generation
ANC/
Checksum
/352M
Extraction
SMPTE 425M
Level B Level A
1080p 50/60 4:2:2 10-bit
Illegal code
remap,
TRS/
Line Number/
CRS
Insertion,
EDH Packet
Insertion
Mux
Output Mux/
Demux
SDO
SDO
Buffer Mux
DVB-ASI
Decoder
I/O Crosspoint
PCLK
DOUT[19:0]
STAT[5:0]
Revision History
GS2970 Functional Block Diagram
Version ECR PCN
4
158468
–
3
153143 53865
2
151817
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1
150800
–
0
150716
–
D
149446
–
C
148809
–
B
148768
–
A
147986
–
Date
September 2012
November 2009
June 2009
December 2008
October 2008
August 2008
January 2008
December 2007
December 2007
Changes and/or Modifications
Changes throughout the document.
Added reference to GS2970/GS2971 Errata (document number 53092).
Corrections to Timing Diagrams in Figure 4-4, Figure 4-5 and Figure 4-6.
Clarification to Section 4.18.8. Updates to all sections.
Converted to Data Sheet. Updates to all sections.
Converted to Preliminary Data Sheet.
Updated document with new format. Changed programming table for
STAT2_CONFIG register (bits 14-10 in register 008h) in Table 4-29: Video Core
Configuration and Status Registers. Added Table 4-3: Input Clock
Requirements. Added Figure 4-3: 27MHz Clock Sources. Changed SCLK period
in Table 4-28. Removed Flywheel references from the Block Diagram and TAC.
Updates to all sections.
Updates and revised 5.1 Typical Application Circuit.
New Document.
GS2970 3Gb/s, HD, SD SDI Receiver Complete with
SMPTE Audio and Video Processing
Data Sheet
47478 - 4
September 2012
3 of 145