GS2960 Datasheet, PDF (2/97 Pages) Semtech Corporation – 3Gb/s, HD, SD SDI Receiver Complete with SMPTE Video Processing

The device operates in one of four basic modes: SMPTE
mode, DVB-ASI mode, Data-Through mode or Standby
mode.
In SMPTE mode, the GS2960 performs SMPTE
de-scrambling and NRZI to NRZ decoding and word
alignment. Line-based CRC errors, line number errors, TRS
errors and ancillary data check sum errors can all be
detected. The GS2960 also provides ancillary data
extraction. The entire ancillary data packet is extracted,
and written to host-accessible registers. Other processing
functions include H:V:F timing extraction, Luma and
Chroma ancillary data indication, video standard detection,
and SMPTE 352M packet detection and decoding. All of the
processing features are optional and may be enabled or
disabled via the Host Interface.
Both SMPTE 425M Level A and Level B inputs are
supported. The GS2960 also provides user-selectable
conversion from Level B to Level A for 1080p 50/60 4:2:2
10-bit formats only.
In DVB-ASI mode, sync word detection, alignment and
8b/10b decoding is applied to the received data stream.
In Data-Through mode all forms of SMPTE and DVB-ASI
processing are disabled, and the device can be used as a
simple serial to parallel converter.
The device can also be placed in a lower power Standby
mode. In this mode, no signal processing is carried out and
the parallel output is held static.
Parallel data outputs are provided in 20-bit or 10-bit
multiplexed format for 3Gb/s, HD and SD video rates. For
1080p 50/60 4:2:2 10-bit, the parallel data is output on the
20-bit parallel bus as Y on 10 bits and Cb/Cr on the other 10
bits. As such, this parallel bus can interface directly with
video processor ICs. For other SMPTE 425M mapping
structures, the video data is mapped to a 20-bit virtual
interface as described in SMPTE 425M. In all cases this
20-bit parallel bus can be multiplexed onto 10 bits for a low
pin count interface with downstream devices. The
associated Parallel Clock input signal operates at 148.5 or
148.5/1.001MHz (for all 3Gb/s HD 10-bit multiplexed
modes), 74.25 or 74.25/1.001MHz (for HD 20-bit mode),
27MHz (for SD 10-bit mode) and 13.5MHz (for SD 20-bit
mode).
NOTE: for 3Gb/s 10-bit mode the device operates in Dual
Data Rate (DDR) mode, where the data is sampled at both
the rising and falling edges of the clock. This reduces the I/O
speed requirements of the downstream devices.
Functional Block Diagram
VBG
LB_CONT
LF
SDI
TERM
SDI
Crystal
Buffer/
Oscillator
GSPI and
JTAG Controller
Host
Interface
Buffer
Reclocker
with
Integrated
VCO
Serial
to
Parallel
Converter
Descramble,
Word Align,
Rate Detect
Flywheel
Video
Standard
Detect
TRS
Detect
Timing
Extraction
ANC/
Checksum
/352M
Extraction
SMPTE 425M
Level B Level A
1080p 50/60 4:2:2 10-bit
Illegal code
remap,
TRS/
Line Number/
CRS
Insertion,
EDH Packet
Insertion
Mux
Output Mux/
Demux
SDO
Buffer Mux
SDO
DVB-ASI
Decoder
I/O Control
PCLK
DOUT[19:0]
STAT[5:0]
GS2960 Functional Block Diagram
GS2960 3Gb/s, HD, SD SDI Receiver Complete with
SMPTE Video Processing
Data Sheet
48003 - 6
September 2012
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