LC75817E Datasheet, PDF (5/43 Pages) Sanyo Semicon Device – 1/8 to 1/10 Duty Dot Matrix LCD Display Controller/Driver with Key Input Function

LC75817E, 75817W
Electrical Characteristics for the Allowable Operating Ranges
Parameter
Hysteresis
Power-down detection voltage
Input high level current
Input low level current
Input floating voltage
Pull-down resistance
Output off leakage current
Output high level voltage
Output low level voltage
Output middle level voltage*²
Oscillator frequency
Current drain
Symbol
Conditions
V_H
V_DET
I_IH
I_IL
V_IF
R_PD
I_OFFH
V_OH1
V_OH2
V_OH3
V_OH4
V_OH5
V_OL1
V_OL2
V_OL3
V_OL4
V_OL5
V_OL6
V_MID1
V_MID2
V_MID3
f_OSC
I_DD1
I_DD2
I_LCD1
I_LCD2
CE, CL, DI, INH, KI1 to KI5
CE, CL, DI, INH, OSCI: V_I = 6.0 V
CE, CL, DI, INH, OSCI: V_I = 0 V
KI1 to KI5
KI1 to KI5: V_DD = 5.0 V
DO: V_O = 6.0 V
S1 to S60: I_O = –20 µA
COM1 to COM10: I_O = –100 µA
KS1 to KS6: I_O = –500 µA
P1 to P4: I_O = –1 mA
OSCO: I_O = –500 µA
S1 to S60: I_O = 20 µA
COM1 to COM10: I_O = 100 µA
KS1 to KS6: I_O = 25 µA
P1 to P4: I_O = 1 mA
OSCO: I_O = 500 µA
DO: I_O = 1 mA
S1 to S60: I_O ±20 µA
COM1 to COM10: I_O = ±100 µA
COM1 to COM10: I_O = ±100 µA
OSCI, OSCO: R_OSC = 33 kΩ, C_OSC = 220 pF
V_DD: sleep mode
V_DD: V_DD = 6.0 V, output open, f_OSC = 300 kHz
V_LCD: sleep mode
V_LCD: V_LCD = 10.0 V, output open, f_OSC = 300 kHz
When the display contrast adjustment circuit is used.
Ratings
Unit
min
typ
max
0.1 V_DD
2.5
3.0
V
3.5 V
5.0 µA
–5.0
µA
0.05 V_DD V
50
100
250 kΩ
6.0 µA
V_LCD0 – 0.6
V
V_LCD0 – 0.6
V
V_DD – 1.0 V_DD – 0.5
V_DD – 0.2 V
V_DD – 1.0
V
V_DD – 1.0
V
V_LCD4 + 0.6 V
V_LCD4 + 0.6 V
0.2
0.5
1.5 V
1.0 V
1.0 V
0.1
0.5 V
2/4 (V_LCD0 – V_LCD4) – 0.6
3/4 (V_LCD0 – V_LCD4) – 0.6
1/4 (V_LCD0 – V_LCD4) – 0.6
210
2/4 (V_LCD0 – V_LCD4) + 0.6
V
3/4 (V_LCD0 – V_LCD4) + 0.6
V
1/4 (V_LCD0 – V_LCD4) + 0.6
V
300
390 kHz
100 µA
500
1000 µA
5 µA
450
900 µA
I_LCD3
V_LCD: V_LCD = 10.0 V, output open, f_OSC = 300 kHz
When the display contrast adjustment circuit is not used.
200
400 µA
Note: *2. Excluding the bias voltage generation divider resistor built into the V_LCD0, V_LCD1, V_LCD2, V_LCD3, and V_LCD4. (See figure 1.)
To the common and segment drivers
Excluding these resistors
Figure 1
No. 6144-5/43