LC75817E Datasheet, PDF (29/43 Pages) Sanyo Semicon Device – 1/8 to 1/10 Duty Dot Matrix LCD Display Controller/Driver with Key Input Function

LC75817E, 75817W
2. Block states during a system reset
(1) CLOCK GENERATOR, TIMING GENERATOR
When a reset is applied, the oscillator on the OSCI, OSCO pins is started forcibly. This generates the base clock and
enables instruction execution.
(2) INSTRUCTION REGISTER, INSTRUCTION DECODER
When a reset is applied, these circuits are forcibly initialized internally. Then, when instruction execution starts, the
IC operates according to those instructions.
(3) ADDRESS REGISTER, ADDRESS COUNTER
When a reset is applied, these circuits are forcibly initialized internally. Then, the DCRAM and the ADRAM
addresses are set when “Set AC address” instruction is executed.
(4) DCRAM, ADRAM, CGRAM
Since the contents of the DCRAM, ADRAM, and CGRAM become undefined during a reset, applications must
execute “DCRAM data write”, “ADRAM data write (If the ADRAM is used.)”, and “CGRAM data write (If the
CGRAM is used.)” instructions before executing a “display on/off control” instruction.
(5) CGROM
Character patterns are stored in this ROM.
(6) LATCH
Although the value of the data in the latch is undefined during a reset, the ADRAM, CGROM, and CGRAM data is
stored by executing a “display on/off control” instruction.
(7) COMMON DRIVER, SEGMENT DRIVER
These circuits are forced to the display off state when a reset is applied.
(8) CONTRAST ADJUSTER
Display contrast adjustment circuit operation is disabled when a reset is applied. After that, the display contrast can be
set by executing a “set display contrast” instruction.
(9) KEY SCAN, KEY BUFFER
When a reset is applied, these circuits are forcibly initialized internally, and key scan operation is disabled. Also, the
key data is all set to 0. After that, key scanning can be performed by executing a “set key scan output state”
instruction.
(10) GENERAL PORT
The general-purpose output ports are fixed at the low level (V_SS) when a reset is applied.
(11) CCB INTERFACE, SHIFT REGISTER
These circuits go to the serial data input wait state.
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