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LC75817E Datasheet, PDF (27/43 Pages) Sanyo Semicon Device – 1/8 to 1/10 Duty Dot Matrix LCD Display Controller/Driver with Key Input Function
LC75817E, 75817W
Voltage Detection Type Reset Circuit (VDET)
This circuit generates an output signal and resets the system when logic block power is first applied and when the voltage
drops, i.e., when the logic block power supply voltage is less than or equal to the power down detection voltage VDET,
which is 3.0V, typical. To assure that this function operates reliably, a capacitor must be added to the logic block power
supply line so that the logic block power supply voltage VDD rise time when the logic block power is first applied and the
logic block power supply voltage VDD fall time when the voltage drops are both at least 1 ms. (See Figure 3.)
Power Supply Sequence
The following sequences must be observed when power is turned on and off. (See Figure 3.)
• Power on :Logic block power supply(VDD) on → LCD driver block power supply(VLCD) on
• Power off:LCD driver block power supply(VLCD) off → Logic block power supply(VDD) off
However, if the logic and LCD driver blocks use a shared power supply, then the power supplies can be turned on and off
at the same time.
System Reset
1. Reset function
The LC75817E/W performs a system reset with the VDET. When a system reset is applied, the display is turned off, key
scanning is disabled, the key data is reset, and the general-purpose ports are set to and held at the low level (VSS). These
states that are created as a result of the system reset can be cleared by executing the instruction described below. (See
figure 3.)
• Clearing the display off state
Display operation can be enabled by executing a “display on/off control” instruction. However, since the contents of the
DCRAM, ADRAM, and CGRAM are undefined, applications must set the contents of these memories before turning on
display with the “display on/off control” instruction. That is, applications must execute the following instructions.
• Set display technique
• DCRAM data write
• ADRAM data write (If the ADRAM is used.)
• CGRAM data write (If the CGRAM is used.)
• Set AC address
• Set display contrast (If the display contrast adjustment circuit is used.)
After executing the above instructions, applications must turn on the display with a “display on/off control” instruction.
Note that when applications turn off in the normal mode, applications must turn off the display with a “display on/off
control” instruction or the INH pin.
• Clearing the key scan disable and key data reset states
Executing a “set key scan output state” instruction not only creates a state in which key scanning can be performed, but
also clears the key data reset.
• Clearing the general-purpose output ports locked at the low level (VSS) state
Executing a “set general-purpose output port state” instruction clears the general-purpose output ports locked at the low
level (VSS) state and sets the states of the general-purpose output ports.
No. 6144-27/43